LTC/MTC LEDs and diagnostic connectors
MTC-1 LED Description
JBL 14-Apr-1992
Layout of LEDs for MTC-1
* DS.01 Trigger * DS.03 Nline
* DS.02 Abort * DS.04 Interrupt
g DS.05 +5V supply DS.13 BCN0 Fault
g DS.06 -5V2 supply DS.14 Clock Fault
* DS.07 Error DS.15 Command Fault
* DS.08 Initialise * DS.16 Next Buffer Full
* DS.09 Test Enable DS.17 LTC BCN0 Fault
DS.10 Pause Mode DS.18 LTC Clock Fault
DS.11 ROC Pipeline Freeze DS.19 LTC Reset
DS.12 End Of Run DS.20 PLL Fault
DS.21 MTC BUSY DS.29 BUSYA - MTC Accept
DS.22 Stand By y DS.30 XTAL clock running
DS.23 Available y DS.31 GFLT clock running
DS.24 Initialise DS.32 Pipeline running
DS.25 Ready DS.33 Copy running
DS.26 Accept DS.34 ROC in Control
DS.27 BUSYS - MTC Stand By DS.35 GFLT in Control
DS.28 BUSYI - MTC Initialise DS.36 LTC BUSY
Notes
- LEDs marked * have an extended flash so a single pulse can be seen.
DS.01, DS.02, DS.03, DS.04 have a short extended flash.
DS.07, DS.08, DS.09, DS.16 have a longer extended flash.
- DS.01, DS.02, DS.08, DS.09 show the commands output to the LTCCs.
- DS.10, DS.11, DS.12 show when the system is in a special state.
- DS.13 - DS.20 show the Control Status register Fault bits.
Once on they stay on until cleared by the ROC (or RESET or start of Run),
except DS.16 Next Buffer Full (unlike the CSR bit).
- DS.21 - DS.36 show the Current State register bits.
The more important MTC LEDs
- DS.01 Trigger
- Trigger is output to the LTCs.
- DS.03 Nline
- MTC is addressed by the ROC.
- DS.07 Error
- Error is caused by Command Fault, Timeout, RESET, entering Stand By,
or is set by the ROC. Fatal Error sent to GFLT.
- DS.16 Next Buffer Full
- An LTC has Next Buffer Full (but can accept a Trigger if BUSY off).
- DS.20 PLL FAULT
- The 96nsec-to-48nsec PLL has lost its lock.
- DS.21 MTC BUSY
- BUSY output to GFLT. Always on under ROC Control.
BUSY off means ready for FLT Accept (Initialise or Trigger) from GFLT.
- DS.23 Available
- Available for Run and waiting for Initialise.
- DS.25 Ready
- Ready and waiting for Trigger.
- DS.26 Accept
- BUSY while accepting an event after Trigger.
- DS.30 XTAL clock running
- (selected if not GFLT in Control).
- DS.31 GFLT clock running
- (selected only if GFLT in Control).
- DS.34 ROC in Control
- Internal XTAL clock and ROC commands are output to LTCCs.
- DS.35 GFLT in Control
- External GFLT clock and GFLT signals are output to LTCCs.
- DS.36 LTC BUSY
- An (enabled) LTC is BUSY : the OR of the enabled LTC BUSY inputs.
Enabled but unused BUSY inputs must be pulled down by 50 ohms (or less).
MTC-2 LED Description
* DS.01 Trigger TRG * DS.03 Nline N
* DS.02 Abort ABT * DS.04 Interrupt INT
FAULTS :
--------
g DS.05 +5V supply +5V DS.13 BCN0 Fault BC0
g DS.06 -5V2 supply -5V DS.14 Clock Fault CLK
* DS.07 Error ERR DS.15 Command Fault COM
* DS.08 Initialise Out INO * DS.16 Next Buffer Full FUL
* DS.09 Test Enable TEN DS.17 LTC BCN0 Fault LB0
y DS.10 Pause Mode PAU DS.18 LTC Clock Fault LCK
DS.11 ROC Pipeline Freeze FRE DS.19 LTC Reset LRS
DS.12 End Of Run EOR DS.20 PLL Fault PLL
MTC STATE : MTC STATE :
----------- -----------
DS.21 MTC BUSY BSY DS.29 BUSYA-MTC Accept BAC
DS.22 Stand By STB y DS.30 XTAL clock running XCK
DS.23 Available AVA y DS.31 GFLT clock running GCK
DS.24 Initialise INI DS.32 Pipeline running P/L
DS.25 Ready RDY DS.33 Copy running CPY
DS.26 Accept ACC DS.34 ROC in Control ROC
DS.27 BUSYS-MTC Stand By BST DS.35 GFLT in Control GFL
DS.28 BUSYI-MTC Initialise BSI DS.36 LTC BUSY LBY
Notes :
- LEDs marked -*- have an extended flash,
so a single pulse can be seen :
DS.01, DS.02, DS.03, DS.04 have a short extended flash.
DS.07, DS.08, DS.09, DS.16 have a longer extended flash.
- LEDs marked -g- are green : DS.05, DS.06
- LEDs marked -y- are yellow : DS.10, DS.30, DS.31
- DS.01, DS.02, DS.08, DS.09 show the commands output to the LTCCs.
- DS.10, DS.11, DS.12 show when the system is in a special state.
- DS.13 - DS.20 show the Control Status register Fault bits.
Once ON they stay on until cleared by the ROC
(or RESET or Start of Run),
except DS.16 Next Buffer Full (unlike the CSR bit).
- DS.21 - DS.36 show the Current State register bits.
"LTC BUSY INPUTS" and "CURRENT BUFFER USED" LEDs
DS.47 LTC Busy Input 1 g DS.37 DPM buffer 0
DS.48 LTC Busy Input 2 g DS.38 DPM buffer 1
DS.49 LTC Busy Input 3 g DS.39 DPM buffer 2
DS.50 LTC Busy Input 4 g DS.40 DPM buffer 3
DS.51 LTC Busy Input 5 g DS.41 DPM buffer 4
DS.52 LTC Busy Input 6 g DS.42 DPM buffer 5
DS.53 LTC Busy Input 7 g DS.43 DPM buffer 6
DS.54 LTC Busy Input 8 g DS.44 DPM buffer 7
DS.55 LTC Busy Input 9 g DS.45 DPM buffer 8
DS.56 LTC Busy Input 10 g DS.46 DPM buffer 9
DS.57 LTC Busy Input 11
DS.58 LTC Busy Input 12
DS.59 LTC Busy Input 13
DS.60 LTC Busy Input 14
DS.61 LTC Busy Input 15
DS.62 LTC Busy Input 16
DS.63 LTC Busy Input 17
DS.64 LTC Busy Input 18
DS.65 LTC Busy Input 19
DS.66 LTC Busy Input 20
Note : LEDs marked -g- are green
------
List of Test Points and abbreviations :
TEST PNTS :
-----------
TP.0 GND Signal ground GND
TP.1 96NSCK 96 nsec clock from GFLT 96N
TP.2 48NSCK 48 nsec clock from PLL 48N
TP.3 N48NSCK 48 nsec clock from delay circuit N48
TP.4 CLK14 48 nsec clock to Z-LTCCs C14
TP.5 INCLK 48 nsec clock strobing GFLT signals INC
TP.6 BCN0GFLT BCN0 from GFLT BC0
TP.7 GFLTACCEPT ACCEPT from GFLT ACC
TP.8 TESTEND TEST ENABLE from GFLT TEN
Description of some of the LEDs
- DS.01 TRIGGER
- Trigger is output to the LTCs.
- DS.03 NLINE
- MTC is addressed by the ROC.
- DS.07 ERROR
- Error is caused by COMMAND FAULT, RESET, entering STAND BY,
or is set by the ROC. FATAL ERROR sent to GFLT.
- DS.08 INITIALISE OUT
- Initialise command sent to LTCs
- DS.16 NEXT BUFFER FULL
- An LTC has Next Buffer Full (but can accept a Trigger if BUSY off).
- DS.20 PLL FAULT
- The 96nsec-to-48nsec PLL has lost its lock
- DS.21 MTC BUSY
- BUSY output to GFLT. Always on under ROC Control.
BUSY off means ready for FLT Accept (Initialise or Trigger) from GFLT.
- DS.23 AVAILABLE
- Available for Run and waiting for Initialise.
- DS.25 READY
- Ready and waiting for Trigger.
- DS.26 ACCEPT
- BUSY while accepting an event after Trigger.
- DS.30 XTAL CLOCK RUNNING
- (selected if not GFLT in Control).
- DS.31 GFLT CLOCK RUNNING
- (selected only if GFLT in Control).
- DS.34 ROC IN CONTROL
- Internal XTAL clock and ROC commands are output to LTCCs.
- DS.35 GFLT IN CONTROL
- External GFLT clock and GFLT signals are output to LTCCs.
- DS.36 LTC BUSY
- An (enabled) LTC is BUSY : the OR of the enabled LTC BUSY inputs.
Enabled but unused BUSY inputs must be pulled down by 50 ohms (or less).
- DS.47-66 LTC BUSY INPUTS 1 - 20
- Shows the state of the 20x Z-LTC BUSY inputs.
- DS.37-46 DPM BUFFERS 0 - 9
- Shows the current buffer free to accept or accepting data.
Layout and Labels on Front Panel
BUSY IN: BUFFER:
TRG N 1 0
ABT INT 2 1 ____
FAULTS: 3 2 |M *)
+5V BC0 4 3 |T
-5V CLK 5 4 |C
ERR COM 6 5 |
INO FUL 7 6 |C
TEN LB0 8 7 |T
PAU LCK 9 8 |R
FRE LRS 10 9 |
EOR PLL 11 TEST PNTS: |P
MTC STATE: 12 GND |1
BSY BAC 13 96N ----
STB XCK 14 48N ____
AVA GCK 15 N48 |G
INI P/L 16 C14 |F
RDY CPY 17 INC |L
ACC ROC 18 BC0 |T
BST GFL 19 ACC |
BIN LBY 20 TEN |C
|L
|K
|
|P
|5
RESET EXT.TRIG.IN ----
____
TRIG. |G
|F
S.STEP LTC BUSY IN |L
|T
1 |
CLOCK OUT 2 |C
1 3 |T
2 4 |R
3 5 |
4 6 |P
7 |4
8 ----
9 ____
MTC-LTC 10 |G
BUS -B- 11 |F
OUT 12 |L
13 |T
14 |
15 |N
MTC-LTC 16 |U
BUS -A- 17 |M
OUT 18 |
19 |P
20 |3
----
Note : *) turn each letter
------ by 90 deg clockwise
This version : MP-UCL, 16 Feb. 1996
Previous versions : 29 Nov. 1994
24 Nov. 1994
23 Nov. 1994
8 Nov. 1994
7 Nov. 1994
JBL, 14 Apr. 1992
Layout of LEDs for Z-LTCC-5,6 & 7
LABEL: NO: FUNCTION: LABEL: NO: FUNCTION:
-------------------------------------------------------------------------
N1 * DS.01 Nline TR * DS.03 Transfer
IN * DS.02 Interrupt RC * DS.04 RESET
+5 g DS.05 +5V supply PL DS.17 Ready (Pipeline Control)
-5 g DS.06 -5V2 supply CP DS.18 Copy Pipeline
-10 g DS.07 -10V supply BF DS.19 Wait for Buffer
NR y DS.08 LCC - No Reply VA DS.20 Wait for Valid
RE y DS.09 LCC - Ready RO DS.21 Wait for ROC
B0 DS.10 BCN0 Fault XC y DS.22 XTAL clock running
CL DS.11 Clock Fault MC y DS.23 MTC clock running
PA y DS.12 Pause Mode PO DS.24 Pipeline running
LB DS.13 LTC BUSY CO DS.25 Copy running
ST DS.14 Stand By RC DS.26 ROC in Control
AV DS.15 Available MC DS.27 MTC in Control
IN DS.16 Initialise MR DS.28 MTC Request
Notes
- LEDs marked * have an extended flash so a single pulse can be seen.
DS.01, DS.02, DS.03, DS.04 have a short extended flash.
- DS.08, DS.09 are Calibration Controller LEDs.
- DS.10, DS.11 show the Control Status register Fault bits.
Once on they stay on until cleared by the ROC (or RESET or start of Run).
- DS.13 - DS.28 show the Current State register bits.
- g = green LED
y = yellow LED
= red LED
The more important LTC LEDs
- Nline
- LTC is addressed by the ROC.
- Interrupt
- LTC is asserting the Interrupt line.
- Transfer
- LTC is asserting the Transfer line.
- LTC BUSY
- BUSY output to MTC. Always on under ROC Control.
BUSY off means ready for FLT Accept (Initialise or Trigger) from MTC.
- Available
- Available for Run and waiting for Initialise.
- Ready (Pipeline Control)
- Ready and waiting for Trigger.
- Wait for Buffer
- BUSY waiting for the next buffer to be freed by the ROC.
- Wait for Valid
- Waiting for deassertion of Trigger to validate event buffer, or for Abort.
- Wait for ROC
- BUSY waiting for the ROC to clear End Of Run or ROC Pipeline Freeze.
- XTAL clock running
- (selected if not MTC in Control).
- MTC clock running
- (selected only if MTC in Control).
- ROC in Control
- Internal XTAL clock and ROC commands are used.
- MTC in Control
- External MTC clock and MTC commands are used.
Diagnostics connectors on the front panel of Z-LTCCs
- DIAGNOSTICS CONNECTOR J31 PIN-OUT :
- FOR Z-LTCC-3s WIRE-WRAPS AND -4s, -5s MULTIWIRE
1 LTCBUSYOUT 2 ST(1)
3 ST(2) 4 ST(3)
5 ST(4) 6 ST(5)
7 ST(6) 8 ST(7)
9 ST(8) 10 ST(9)
11 CURSTATE9 12 CURSTATE10
13 CURSTATE11 14 CURSTATE12
15 CURSTATE13 16 CURSTATE14
17 * WRITEFAULT * 18 NLINE1
19 NMEMEN 20 NWRITE
21 NTRANSFEROUT 22 NBCN0OUT
23 NINTERRUPT OUT 24 BUFFULL
25 BUFFERFULLINPUT 26 FLTACCEPT
27 INITIALISE 28 ABORT
29 EORIN 30 ROCPLFRIN
31 BCN0IN 32 TENABLE
33 CLK1 34 MTCSTROBECLK
35 CLK11 36 CLK14
37 NCLK2OUT 38 CLK24
39 CLK13 40 10MHz CLK
41 PA(0) 42 DPA(0)
43 INTBUSY 44 NZERO RESET
45 NZERO RESET2 46 NZERO RESET4
47 NCLR1 48 INHIBIT COUNT1
49 INHIBIT COUNT3 50 TESTENABLE
NOTE: * WRITEFAULT * NOT AVAILABLE ON LTCC-3s & 4s
- FOR Z-LTCC-6s & -7s MULTIWIRE
1 LTCBUSYOUT 2 ST(1)
3 ST(2) 4 ST(3)
5 ST(4) 6 ST(5)
7 ST(6) 8 ST(7)
9 ST(8) 10 ST(9)
11 CURSTATE9 12 CURSTATE10
13 CURSTATE11 14 CURSTATE12
15 CURSTATE13 16 CURSTATE14
17 WRITEFAULT 18 NLINE1
19 NMEMEN 20 NWRITE
21 NTRANSFEROUT 22 NBCN0
23 NINTERRUPT OUT 24 BUFFULL
25 BUFFERFULLINPUT 26 FLTACCEPT
27 INITIALISE 28 ABORT
29 EORIN 30 ROCPLFRIN
31 BCN0IN 32 TENABLE
33 BCLK1 34 BMTCSTROBECLK
35 BCLK11 36 BCLK14
37 BNCLK2OUT 38 BCLK24
39 BCLK13 40 B10MHz CLK
41 BPA(0) 42 BDPA(0)
43 INTBUSY 44 NZERO RESET
45 NZERO RESET2 46 NZERO RESET4
47 NCLR1 48 INHIBIT COUNT1
49 INHIBIT COUNT3 50 TESTENABLE
- TEST POINTS TP2 ON LEDs PCB :
ON Z-LTCC-6s and -7s MULTIWIRE ONLY :
1 CLK48 CLK14 ( 48nsec strobe clock )
fed back onto LTCC via the backplane
twisted pair loom as ECL and
re-converted to TTL
2 BNCLK2OUT 96nsec clock
3 BPA(0) RA(0)= PLM lsb address
4 BDPA(0) DA(0)= DPM lsb address
All buffered TTL signals, with
same timing as on backplane
This version : MP-UCL, 3 Aug. 1994
Previous versions : 22 Mar. 1994
21 Mar. 1994
10 Mar. 1994
9 Nov. 1993
20 Oct. 1993
17 Sep. 1993
13 Sep. 1993
19 Nov. 1992
12 May. 1992
30 Mar. 1992